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529 days ago
Unfiled. Edited by Jim Huang 529 days ago
Jim H
  • 可否確認最新qemu-linaro 的狀況? 
 
  • /*******************************************************************************
  •  * The target cpu is being turned on. Allow the TSPD/TSP to perform any actions
  •  * needed. Nothing at the moment.
  •  ******************************************************************************/
  • static void tspd_cpu_on_handler(uint64_t target_cpu)
  • {
  • }
 
 
645 days ago
Unfiled. Edited by ajblane 645 days ago
ajblane  GIC register access
  •  All registers support 32-bit word accesses with the access type 
 
 
  • The GIC implements a minimum of 32 and a maximum of 256 priority levels
  • ARM recommends that, for a Group 1 interrupt, bit[7] is set to 1
  • Many system implementations require that no Group 1 interrupt ever preempt any Group 0 interrupt
  • Group 0 interrupts are always assigned priority values in the lower half of the supported priority value range
  • Group 1 interrupts are always assigned priority values in the upper half of the supported priority value range
以上節錄製ARM®  Generic Interrupt Controller Architecture version 2.0 P.51-P.59,可知越大的priority value優先權越小。
 
心得
 
 
注意AMR提供的模擬器已經更新至 ARMv8-A Foundation Platform Version 9.5,此模擬器的memory map是跟之前不一樣的。
 
GIC有分v1, v2, v3,而舉例GICv2他有實作成有Security Extensions或者沒有,而foundation virt-v8 board中,它有GICv2 with security的,有沒有搭配Security Extensions會影響 register欄位的對應例如 : CPU Interface Control Register GICC_CTLR,請參閱ARM®  Generic Interrupt Controller Architecture version 2.0。
 
此時的foundation virt-v8 board平台,平台定義的GIC base是在0x08000000~0x08020000。而Distributor base的offset為0x00,CPU interface base的offset為 0x10000
 
而QEMU中的virt-v8 board,memory map位置至今並沒有改變,如下,參考virt.c
 
QEMU virt-v8 board的GIC也是有GICv2 with security。
 
對於initial CPU interface register的部分
  • Interrupt Priority Mask Register, GICC_PMR 設定成0x80。大於0x80的priority level才能被singled傳至CPU
 
Reference
ARM®  Generic Interrupt Controller Architecture version 2.0
 
 
656 days ago
Unfiled. Edited by ajblane 656 days ago
 
 
658 days ago
Unfiled. Edited by ajblane 658 days ago
ajblane Device Tree in Xivsor
說明
 
對於在Xvisor的Device Tree初始化部分vmm_devtree_init()會產生static struct vmm_devtree_ctrl dtree_ctrl的資訊,例如: 裝置資訊所串成的串列/ 裝置對應的操作函式陣列。
 
eXtensible Versatile hyperviSOR 
[PATCH 0/5] arm64 (aka aarch64/armv8) support in Xvisor
  • cortex-a57, cores數目為 4
 
建立不同的裝置操作函數資料庫
 
 
SMP_OPS_DECLARE(smp_spin_table, &smp_spin_table_ops); 這巨集意思是把smp_spin_table_ops所指的資料(操作運算)存放在linker.ld規劃的空間裡面,而這空間是由struct vmm_devtree_nidtbl_entry組成,而此空間由指標__smp_spin_tablenid所指。
  • smp_spin_table_ops所指的資料格式為
  • struct smp_operations {
  •         const char        *name;
  •         int                (*cpu_init)(struct vmm_devtree_node *, unsigned int);
  •         int                (*cpu_prepare)(unsigned int);
  •         int                (*cpu_boot)(unsigned int);
  •         void                (*cpu_postboot)(void);
  • };
  • smp_spin_table_ops所指的資料為
  • static struct smp_operations smp_spin_table_ops = {
  •         .name = "spin-table",
  •         .cpu_init = smp_spin_table_cpu_init,
  •         .cpu_prepare = smp_spin_table_cpu_prepare,
  •         .cpu_boot = smp_spin_table_cpu_boot,
  •         .cpu_postboot = smp_spin_table_cpu_postboot,
  • };
  • 如何把資料指定至linker.ld規劃的空間裡面,而此空間為struct vmm_devtree_nidtbl_entry結構組成。參考以下,此結構可以看出它可以記錄不同的_data代表著不同的operators,並且還可以記錄signature或者subsys,這應該是為了方便搜尋特定的operators。為了解決可以讓不同的operators都可以設定空間至linker.ld規劃的空間裡面,於是撰寫了巨集函數VMM_DEVTREE_NIDTBL_ENTRY
  •  
  • #define VMM_DEVTREE_NIDTBL_ENTRY(nid, _subsys, _name, _type, _compat, _data) \
  • __nidtbl struct vmm_devtree_nidtbl_entry __##nid = { \
  •         .signature = VMM_DEVTREE_NIDTBL_SIGNATURE, \
  •         .subsys = (_subsys), \
  •         .nodeid.name = (_name), \
  •         .nodeid.type = (_type), \
  •         .nodeid.compatible = (_compat), \
  •         .nodeid.data = (_data), \
  • }
  • VMM_DEVTREE_NIDTBL_ENTRY(name, "smp_ops", "", "", "", ops)
  • VMM_DEVTREE_NIDTBL_ENTRY(name, "generic_board", "", "", compat, inst)
  •  
  •                 PROVIDE(_nidtbl_start = .);
  •                 *(.nidtbl)
  •                 . = ALIGN(8);
  •                 PROVIDE(_nidtbl_end = .);
 
PS:  Macros使用  ## v.s. # 差別   # 代表轉成字串  ## 代表連接成變數名
 
依照foundation-v8.dtsi所撰寫的裝置資訊與載入對應的裝置操作函式
 
vmm_devtree_init裡面做的事情
  • 把foundation-v8.dtsi轉成struct  vmm_devtree_node 所形成的串列並把root指至dtree_ctrl.root
  • 透過arch_nidtbl_vaddr,arch_nidtbl_size知道上述的裝置運算函數資料庫存放的地方與大小
  • 把裝置運算函數資料庫從linker.ld規劃的空間裡載至dtree_ctrl.nidtbl所指的陣列中。
 
所以可以得到dtree_ctrl的初始化,可以知道裝置資訊所串成的串列,總共有幾個裝置操作函式運算,儲存裝置對應的操作函式至陣列裡。
  • struct vmm_devtree_ctrl {
  •         struct vmm_devtree_node *root;
  •         u32 nidtbl_count;
  •         struct vmm_devtree_nidtbl_entry *nidtbl;
  • };
  • static struct vmm_devtree_ctrl dtree_ctrl;
 
 
661 days ago
1 / 6
Unfiled. Edited by ajblane 661 days ago
  •   [7. Create foundation_v8_boot.axf for running it on Foundation v8 Model]
ajblane
  •   # ${CROSS_COMPILE}gcc -nostdlib -nostdinc -e _start -Wl,--build-id=none -Wl,-Ttext=0x80000000 -DGENTIMER_FREQ=100000000 -DUART_PL011 -DUART_PL011_BASE=0x1c090000 DGICv2 -DGIC_DIST_BASE=0x2c001000 -DGIC_CPU_BASE=0x2c002000 -DSPIN_LOOP_ADDR=0x8000fff8 -DIMAGE=./build/vmm.bin -DDTB=./build/arch/arm/board/generic/dts/foundation-v8/one_guest_virt-v8.dtb -DINITRD=./build/disk.img ./docs/arm/foundation_v8_boot.S -o ./build/foundation_v8_boot.axf
 
Members (26)
Jim Huang 柯志宏 柯志宏 宗穎 沈 莊彥宣 林俞呈 Li-Hua Lyu 吳子晨 Wei Hung Chiu Wei Hung Chiu Viller Hsiao Frodo Lai Shih-te Yang KJ wu 李育丞 Taihsiang Ho ISheng Lin 屈光孝 惟甯 張 ckjboy003@gmail.com

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